1. Field of the Invention
This invention relates to computer systems and more particularly to system management interrupt sources employed within computer systems.
2. Description of the Relevant Art
Interrupt-driven computer systems provide a mechanism that allows a hardware signal to force the software to change its path of execution. The first step a microprocessor takes to process an interrupt is to save the program counter (usually on the stack, an area of memory pointed to by the microprocessor's stack pointer that operates in a last-in-first-out fashion). This allows the software to return to normal program flow at the point at which it was interrupted by loading the saved value from the stack into the microprocessor's program counter. Some microprocessors automatically save other registers (such as the accumulator or index pointer) in addition to the program counter. The actual interrupt processing begins when the microprocessor jumps to the interrupt service routine. The interrupt service routine is a subset of software code that services the interrupt.
If the microprocessor hardware cannot distinguish between various interrupt sources, then the interrupts are called non-vectored. For non-vectored interrupts, the interrupt service routine must test (poll) each of the possible interrupt sources to determine which device generated the interrupt. A faster scheme involves vectored interrupts, which allow an interrupting device to identify itself by driving an ID code on the data bus during an interrupt acknowledge cycle at the beginning of the interrupt processing. The microprocessor then executes the indicated interrupt service routine.
Microprocessors such as the particularly popular models 80386 and 80486 microprocessors include an input terminal (INT) for receiving an interrupt signal. Computer systems that include multiple interrupting devices frequently employ programmable interrupt controllers that allow software prioritizing and masking of the various interrupt sources. Exemplary interrupt sources include keyboards, printers, and real time clocks.
Most microprocessors also employ a non-maskable interrupt (NMI) which cannot be disabled by software. This interrupt is usually processed at the end of the current instruction execution. It is typically used for relatively high-priority error interrupts, such as an abort signal or power-failure detection.
Yet another type of interrupt is a system management interrupt (SMI). A system management interrupt is typically treated with a higher priority than both non-maskable interrupts and standard interrupts. System management interrupts are used to initiate and/or maintain various system management functions, such as, for example, power management.
One problem associated with a typical computer system is the inability to automatically generate a periodic system management interrupt. Such a periodic system management interrupt would be particularly desirable when used in conjunction with power management functions that require high priority servicing at regular intervals and with minimal processing overhead. Since the typical computer system does not employ a flexible periodic system management interrupt source, overall functionality of the system is limited and/or software itself must manage and control the intervals between power management servicing. Thus, a greater burden may be imposed upon the system management software and the performance thereof may be degraded.